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CALL FOR PAPERS
Design and Verification of Embedded Real-Time
Systems Track
of the
29th IEEE Real-Time Systems
Symposium
(RTSS 2008)
November 30 - December 3, 2008
Barcelona, Spain
IMPORTANT DATES
Submission Deadline: Friday, May 16, 2008
Acceptance Decisions: Sunday, August 31, 2008
Final Manuscript: Friday, September 19, 2008
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DESIGN AND VERIFICATION OF EMBEDDED REAL-TIME SYSTEMS
Designing embedded real-time systems is becoming an increasingly
important and difficult task due to the widespread applications,
and increasing complexity of such systems, and the stringent
constraints on reliability, performance, energy consumption, cost,
and time-to-market. The objective of this track is to promote
research on design and analysis, and verification of embedded
real-time systems. It intends to cover the whole spectrum from
theoretical results to concrete applications with an emphasis
on practical and scalable techniques and tools providing the
designers with automated support for obtaining high-quality
software and hardware systems. A particular goal is to provide
a forum for interaction between different research communities,
such as scheduling, hardware/software co-design, and formal
techniques.
Topics of interest include (but are not limited to) the following:
o Modeling, evaluation and optimization of non-functional
aspects such as timing, memory usage, communication bandwidth,
and energy consumption.
o Design space exploration, performance analysis, and mapping of
abstract designsonto target platforms such as time-triggered
architectures and MPSoC.
o Model-based validation techniques ranging from simulation,
testing, model-checking, compositional analysis,
correctness-by-construction and abstract interpretation.
o Algorithms and techniques for the implementation of practical and
scalable tools for modelling, automated analysis and
optimization.
o Theories, languages and tools supporting coherent design flows
spanning software, control, hardware and physical components.
o Case studies and success stories in industrial applications using
existing techniques and tools for system design, analysis and
verification.
Track Chair: Wang Yi, Uppsala University, Sweden
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